Colour-sequential illumination of display panels and projectors may use LEDs as the source of image-bearing light. Images are formed using short pulses of patterned light from a selected pattern of LEDs within an array of LEDs in a display panel. In order to display a colour image, the array of LEDs must be controlled to generate the desired pattern repeatedly in a rapid sequence of short pulses. This permits the display panel to display the desired pattern in each one of three colour component values (e.g. Red, Green and blue). The effect of the sequential display, visually speaking, is to display the desired pattern in full colour. Of course, the desired pattern may be a still image or may correspond to one frame of a moving image.
In order to achieve a high-quality image, the light output from the LEDs should ideally be uniform over time when the LED is in the “on” state. The LEDs should ideally be well synchronised with the switching of the display panel such that each LED changes between the “on” and “off” states rapidly, without significant delay.
Achieving these desirable properties is made problematic by the inherent junction capacitance of an LED which becomes a significant parasitic current sink when an LED is driven at low luminance levels and, therefore at low current levels. The effect is to cause the luminance output of the LED to become skewed in time during the operation of the LED. In particular, ideally, the luminance profile of a pulse of light output by an LED in a sequential display, should be substantially square as shown in FIG. 1. This is difficult to achieve in practice due to the junction capacitance of the LED, which can be modelled as an ideal diode and a parasitic capacitor connected in parallel across the ideal diode, as is shown schematically in FIG. 2.
When a square pulse of current is input to the LED, the parasitic capacitor takes some of the input current during the initial turn-on of the input current pulse and begins to charge itself. This takes current away from the light-emitting processes within the LED which rely on current flow and, in doing so, the rate of increase in light output from the LED is reduced. In particular a sharp/rapid rise in luminous output is suppressed by the diversion of current to the charging parasitic capacitor. Conversely, when the driving current pulse ends, and the input current falls to zero, the parasitic capacitor begins to discharge and thereby maintains a current—albeit a falling current—through the LED. This discharge current maintains a luminous output from the LED when none is desired. The result is that a sharp/rapid fall in luminous output is suppressed by the supply of current from the discharging parasitic capacitor. A schematic example of this is illustrated in the current and luminosity timing diagrams of FIG. 3.
For example, parasitic junction capacitance in LEDs may be of the order of nanoFarrads (e.g. C=4 nFs). The threshold voltage for a high-power LED may be of the order of a few volts (e.g. V=3 volts). If such an LED is driven with a current of I=1 mA, from an initial voltage potential of zero volts in the “off” state, then the time (t) required to reach the 3V threshold voltage would be (t=CV/I) about 12 micro-seconds. This is unacceptable in display systems requiring luminance settling times of about 1 micro-second.
The invention aims to provide an improved driver for an LED for use in a display system.